Liquid crystal displays (LCD) are widely applied in electrical products, such as digital watches, calculators, etc. Moreover, with the advance of techniques for manufacture and design, the thin film transistor-liquid crystal display (TFT-LCD) is being introduced into portable computers, personal digital assistants, color televisions, and is replacing gradually the CRTS that are used for conventional displays. However, following the design rules of TFT-LCD to large scale devices, there are many problems and challenges, such as low yields and low throughput, in developing large scale TFT-LCDs devices.
In general, the TFT-LCD comprises a bottom plate on which is formed thin film transistors and pixel electrodes, and a top plate on which is constructed color filters. The liquid crystal molecules are filled between the top plate and the bottom plate. In their operation, a signal voltage is applied to the TFT that is the switching element of each unit pixel. The TFT receives the signal voltage, then turns on so that data voltage carrying image information can be applied to the corresponding pixel electrode and the liquid crystal via the TFT. The arrangement of the liquid crystal molecules is changed, thereby the optical properties are changed and the image is displayed.
The typical structure of the conventional TFT-LCD is illustrated in FIG. 1, wherein a gate 4 and a storage capacitor electrode 6 are formed on a substrate 2. An insulating layer 8 is formed on the substrate 2 to cover the gate 4 and the storage capacitor electrode 6. An a-silicon layer 10 is formed above the insulating layer 8 and the gate 4, and an n+ a-silicon layer 12 is deposited on the top surface of the a-silicon layer 10. In additional, source/drain (S/D) structures 14 are formed above the n+ a-silicon layer 12. It is noted that data lines 16 are also formed on the insulating layer 8 at the same time while the S/D structures 14 are defined. Moreover, a passivation layer 18 is formed on the substrate 2 to cover the S/D structures 14, the a-silicon layer 10 and the data lines 16. A contact hole 20 is formed on the passivation layer 18 to expose the surfaces of the S/D structures 14. An indium tin oxide (ITO) layer 22 is formed on the passivation layer 16 to connect the S/D structures 14 electrically.
It is noted that the ITO layer deposited on the passivation layer 18 is enlarged as much as possible, even overlaping the scan lines and data lines, for promoting the open ratio, as shown in FIG. 1, in order to increase the brightness of the TFT-LCD. However, the parasitic capacitor effect always occurs in the TFT-LCD structures due to the said overlapping, and causes interference between signals applied on the ITO electrodes and signals transferred from the adjacent data lines. A proposal to solve the issue is to form the TFT-LCD structure as illustrated in FIG. 2, wherein a portion of the ITO layer 22 is removed for preventing the residual ITO layer 22 from covering the data lines 16. However, the open ratio is reduced after removing the portion of the ITO layer 22. Thus, how to enlarge the area of the ITO electrode as much as possible and make the ITO electrode not overlap the scan lines and the data lines are current important issues.